1. Field of the Invention
An aspect of the present invention relates to a semiconductor device including transistors such as insulated gate field effect transistors and a manufacturing method of the semiconductor device.
2. Description of the Related Art
To reduce the leakage current through element isolation area between the transistors, such as insulated gate field effect transistors for making up a semiconductor circuit, it is proposed to provide a polysilicon wiring pattern for shield between the adjacent transistors (For example, refer to JP-2006-059978-A).
However, to realize a sufficient dielectric isolation capability by use of a shield polysilicon wiring pattern, it is required to provide a sufficient area between a gate electrode and the shield polysilicon wiring pattern so as not to come in structural contact with each other. If the provided area is not sufficient, the dielectric isolation capability is degraded. Thus, a large leakage current occurs at an electric-field-applied portion between the shield polysilicon wiring pattern and the gate electrode wiring, and the yield is remarkably degraded.
Although the chip area is reduced in accordance with the recent reducing trend of the design rules, for ensuring process and lithography process margin, it is difficult to reduce the size of such pattern. Further, if the chip area is reduced, it is also feared that a short circuit may occur at such pattern due to dust or contamination mixed thereinto during the manufacturing process.
To reduce the leakage current in the electric-field-applied portion of an element isolation region, it is considered to make the element isolation region further deeper. However, if an STI-structure element isolation region is made deeper, the volume of the element isolation region increases, and the stress of a semiconductor substrate may become strong, thereby causing a DC failure (standby failure). On the other hand, if the element isolation region is made shallow to decrease the volume of an embedded material in the element isolation region and to decrease the stress, the leakage current in the electric-field-applied portion may be increased.